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| 1/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. single-chip type with built-in fet switching regulators output 1.5a or less high-efficiency step-down switching regulator with built-in power mosfet bd9123muv description rohm?s high efficiency step-down switching regulator bd912 3muv is a power supply designed to produce a low voltage including 0.85 to 1.2 volts from 5.5/3.3 vo lts power supply line. offers high efficiency with our original pulse skip control technology and synchronous rectifier. employs a current mode control system to provide faster transient response to sudden change in load. features 1) offers fast transient response with current mode pwm control system. 2) offers highly efficiency for all load range with synchronous rectifier (nch/pch fet) and sllm (simple light load mode) 3) incorporates output voltag e inside control function.(3 bit) 4) incorporates pgood function. 5) incorporates soft-start function. 6) incorporates thermal protection and ulvo functions. 7) incorporates short-current protec tion circuit with time delay function. 8) incorporates shutdown function icc=0a(typ.) 9) employs small surface mount package: vqfn016v3030 applications power supply for lsi including dsp, micro computer and asic absolute maximum ratings (ta=25 ) parameter symbol ratings unit vcc voltage vcc -0.3 +7 * 1 v pvcc voltage pvcc -0.3 +7 * 1 v en,sw,ith voltage en, sw, ith -0.3 +7 v logic input voltage vid<2:0> -0.3 +7 v power dissipation 1 pd1 0.27 * 2 w power dissipation 2 pd2 0.62 * 3 w power dissipation 3 pd3 1.77 * 4 w power dissipation 4 pd4 2.66 * 5 w operating temperature range topr -40 +95 storage temperature range tstg -55 +150 maximum junction temperature tj +150 *1 pd should not be exceeded. *2 ic only *3 1-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm 2 *4 4-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, 1 st and 4 th copper foil area : 10.29mm 2 , 2 nd and 3 rd copper foil area : 5505mm 2 *5 4-layer. mounted on a 74.2mm 74.2mm 1.6mm glass-epoxy board, occupied area by copper foil : 5505mm 2 , in each layers no.11027eat38
technical note 2/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv operating conditions (ta=-40 +95 ) parameter symbol ratings unit min. typ. max. power supply voltage v cc 2.7 3.3 5.5 v pv cc 2.7 3.3 5.5 v en voltage v en 0 - vcc v logic input voltage vid<2:0> 0 - 5.5 v output voltage setting range v out 0.85 - 1.2 v sw average output current i sw - - 1.2 *6 a *6 pd should not be exceeded. electrical characteristics (ta=25 v cc =pv cc =5v, en=v cc , vid<2>=vid<1>=vid<0>= 0v), unless otherwise specified.) parameter symbol limits unit conditions min. typ. max. standby current i stb - 0 10 a en=gnd active current i cc - 300 500 a en low voltage v enl - gnd 0.8 v standby mode en high voltage v enh 2.0 v cc - v active mode en input current i en - 5 10 a v en =5v vid low voltage v vidl - gnd 0.8 v vid high voltage v vidh 2.0 v cc - v vid input current i vid - 5 10 a v vid =5v oscillation frequency f osc 0.8 1 1.2 mhz pch fet on resistance r onp - 0.35 0.60 pv cc =5v nch fet on resistance r onn - 0.25 0.50 pv cc =5v output voltage v out 0.98 1.0 1.02 v vid<2:0>=(0,0,0) ith si nk current i thsi 25 50 - a v out =1.2v ith s ource c urrent i thso 25 50 - a v out =0.8v uvlo threshold voltage v uvlo1 2.4 2.5 2.6 v v cc =5v 0v uvlo release voltage v uvlo2 2.425 2.55 2.7 v v cc =0v 5v power good threshold v pgood 1 70 75 80 % v out 0v power good release v pgood 2 85 90 95 % 0v v out power good delay t pg 2.5 5 10 ms pgood on resistance r onpg - 140 280 soft start time t ss 0.4 0.8 1.6 ms timer latch time t latch 1 2 4 ms output short circuit threshold voltage v scp - v out 0.5 v out 0.7 v v out 0v technical note 3/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv package outline, symbols block diagram, application circuit bd9123muv vqfn016v3030 (unit:mm) fig.1 bd9123muv package outline fig.2 bd9123muv block diagram pin no. & function table pin no. pin name function 1 sw pch/nch fet drain output pin 2 3 4 pgnd nch fet source pin 5 6 gnd ground 7 pgood power good pin 8 ith gm amp output pin/connected phase compensation capacitor 9 v out output voltage pin 10 vid<2> output voltage control pin<2> 11 vid<1> output voltage control pin<1> 12 vid<0> output voltage control pin<0> 13 en enable pin(high active 14 vcc vcc power supply input pin 15 pv cc pch fet source pin 16 fig 3 top view 12 13 8 4 11 10 9 6 5 3 2 1 15 16 sw sw sw pgnd pgnd gnd vid<0> vid<1> vid<2> v out v cc pv cc pv cc 7 14 pgood ith en pv cc pgnd sw gnd output gm amp 4.7h v cc r s q osc uvlo tsd 22f vcc clk slope current comp 10f 14 2 4 6 soft start current sense/ protect + driver logic vref ith r ith c ith 8 selector 12 11 10 9 5 1 3 15 16 vid<0> vid<1> vid<2> v out pgood 7 pgood v cc en 13 v cc 100 0.1f input lot no. d 9 1 2 3 technical note 4/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv characteristics data 0 50 100 150 200 250 300 350 400 -40 -20 0 20 40 60 80 100 temperature:ta[ ] on resistance:ron[o] 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 -40 - 20 0 20 40 60 80 100 temperature:ta[ ] en voltage:ven[v] 0 25 50 75 100 125 150 175 200 -40 -20 0 20 40 60 80 100 temperature:ta[ ] on resistance:ron[o] 0 200 400 600 800 1000 1200 -40 -20 0 20 40 60 80 100 temperature:ta[ ] frequency:fosc[khz] 0.0 0.5 1.0 1.5 2.0 2.7 3.4 4.1 4.8 5.5 input voltage:vcc[v] frequency:fosc[mhz] 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 10000 io [a] efficiency:?[%] 0.96 0.98 1.00 1.02 1.04 -40 - 20 0 20 40 60 80 100 input voltage:vcc[v] output voltage:vout[v] 0.0 0.4 0.8 1.2 1.6 2.0 012345 en voltage:ven[v] output voltage:vout[v] 0.0 0.4 0.8 1.2 1.6 2.0 012345 en voltage:ven[v] output voltage:vout[v] 0.0 0.4 0.8 1.2 1.6 2.0 012345 input voltage:vcc[v] output voltage:vout[v] fig. 7 ta-v out fig.12 ta-v en fig.10 ta-fosc fig.8 efficiency fig.9 power supply voltage- operating frequency fig.11 ta-r onn ,r onp fig.4 vcc-vou t fig.5 v en - v out fig.6 i out -v out io=1.2a ta =25 vcc=5v ta =25 io=0a v out =1.0v vcc=5v ta =25 vcc=5v io=0a vout=1.0v vout=1.0 v out =1.0v vout=1.0v high side (pmos fet) low side (nmos fet) vcc=5v vcc=5.0v ta =25 ta =25 vcc=5v vcc=5.0v fig.14 soft start waveform fig.15 sw waveform io=0ma vcc=5v fig.13 ta-icc vout=1.0v vo sw vcc=5v io=1.2a ta =25 vo sw vcc=5v io=0a ta=25 sllm control vout=1.0v technical note 5/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv v o sw vcc=5v io=1.2a ta =25 fig.16 sw waveform io=1.2a fig.17 transient response io=125ma 850ma(2a) fig.18 transient response io=850ma 125ma(2a) fig.19 bit chance response fig.21 pgood delay fig.20 bit chance response vo io ta =25 vid vo vid[2:0]=(0,0,1) (1,1,1) 0.85v 1.2v vid vo 1.2v 0.85v vid[2:0]= (1,1,1) 0,0,1) pgood v out vcc=5v vo=1v ta =25 0.9v 0.75v tpg i o v o ta =25 technical note 6/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv information on advantages advantage 1 : offers fast transient response with current mode control system. fig.22 comparison of transient response advantage 2 : offers high efficiency for all load range. ? for lighter load: utilizes the current mode contro l mode called sllm for lighter load, which r educes various dissipation such as switching dissipation (p sw ), gate charge/discharge dissipation, esr dissipation of output capacitor (p esr ) and on-resistance dissipation (p ron ) that may otherwise cause degradation in efficiency for lighter load. achieves efficiency improvement for lighter load. ? for heavier load: utilizes the synchronous rectifying mode and the low on-re sistance mos fets incorporated as power transistor. on resistance of pch side mos fet : 0.35m (typ.) on resistance of nch side mos fet : 0.25m (typ.) achieves efficiency improvement for heavier load. offers high efficiency for all load rang e with the improvements mentioned above. advantage 3 : ? supplied in smaller package due to small-sized power mos fet incorporated. ? output capacitor co required for current mode control: 10f ceramic capacitor ? inductance l required for the operating frequency of 1 mhz: 4.7h inductor reduces a mounting area required. fig.24 example application conventional product (load response i o =0.1a 0.6a) bd9123muv (load response i o =0.6a 0.1a) dc/dc convertor r ith l co v out c ith v cc cin v cc r pgood 15mm 20mm c ith co r ith c in l r pgood cf rf 0.001 0.01 0.1 1 0 50 100 pwm sllm inprovement by sllm system improvement by synchronous rectifier efficiency [%] fig.23 efficiency output current io[a] v out 27mv v out 37mv i out i out technical note 7/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv operation bd9123muv is a synchronous rectifying step-down switching regu lator that achieves faster transient response by employing current mode pwm control system. it utiliz es switching operation in pwm (pulse width modulation) mode for heavier load, while it utilizes sllm (simple light load mode) operation for lighter load to improve efficiency. synchronous rectifier it does not require the power to be dissipated by a rectifier externally connected to a conventional dc/dc converter ic, and its p.n junction shoot-through protection circuit limits the shoot-through current during op eration, by which the power dissipation of the set is reduced. current mode pwm control synthesizes a pwm control signal with a inductor current feedback loop added to the voltage feedback. ? pwm (pulse width modulation) control the oscillation frequency for pwm is 1 mhz. set signal fo rm osc turns on a pch mos fet (while a nch mos fet is turned off), and an inductor current i l increases. the current comparator (current comp) receives two signals, a current feedback control signal (sense: voltage converted from i l ) and a voltage feedback control signal (fb), and issues a reset signal if both input signals are identical to each other, and turns off the highside mos fet (while a lowside mos fet is turned on) for the rest of the fixed period. the pwm control repeat this operation. ? sllm (simple light load mode) control when the control mode is shifted from pwm for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn off with the device held operated in norm al pwm control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. although the pwm control loop continues to operate with a set signal from osc and a reset signal from current comp, it is so designed that the reset si gnal is held issued if shifted to the light load mode, with which the switching is tuned off and the switching pulses are th inned out under control. activating t he switching intermittently reduces the switching dissipation and improves the efficiency. fig.25 diagram of current mode pwm control fig.26 pwm switching timing chart fig.27 sllm tm switching timing chart curren t comp set reset sw v out pvcc gnd gnd gnd i l (ave) v out (ave) sense fb curren t comp set reset sw v out pvcc gnd gnd gnd 0a v out (ave) sense fb i l not switching i l osc level shift driver logic rq s i l sw ith current comp gm amp. set reset fb load sense v out v out technical note 8/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv description of operations ? soft-start function en terminal shifted to ?high? activates a soft-starter to gradually establish the output voltage with the current limited durin g startup, by which it is possible to prevent an ov ershoot of output voltage and an inrush current. the inclination of standing up is different and the soft start time is different bec ause of constancy depending on the value offset output voltage. when 1v se ttiing it, it is tss=1msec(typ.) fig.28 soft start action ? shutdown function with en terminal shifted to ?low?, the device turns to standby mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to off. circuit current during standby is 0a(typ.). ? uvlo function detects whether the input voltage sufficient to secure the output voltage of this ic is supplied. and the hysteresis width of 50mv (typ.) is provided to prevent output chattering. fig.29 soft start, shutdown, uvlo timing chart ?pgood function when the output voltage falls below 75% (typ.) of a set va lue, the pgood pin of open-drain is turned off. and the hysteresis width of 15% (typ.) is provided to prevent output chattering. fig.30 pgood timing chart uvlo en uvlo uvlo hysteresis 50mv ts s ts s ts s soft start standby mode operating mode standby mode operating mode standby mode operating mode standby mode en vcc vout vcc,en ts s ts s 1.2v 0.85v [ms] vout 90% the hysteresis width vout 75% pgood t gp technical note 9/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv about setting the output voltage output voltage shifts step by step as often as bit setting to control the overshoot/undershoot that happen when changing the setting value of output voltage. from the bit switching until output voltage reach to se tting value, 8 steps (max) delay will occur. ) switching 3 bit synchronously ) switching the bit during counting ) switching 3 bit with the time lag it is possible to set output voltage, shown the diagram 1 below, by setting vid<0> <2> 0 or 1. vid<2:0> terminal is set to vid<2:0>=( 0,0,0) originally by the pull down resistor with high impedance inside ic. by pulling up/ pulling down about 10k , the original value is changeable optionally. table of output voltage setting vid<2> vid<1> vid<0> v out 0 0 0 1.0v 0 0 1 0.85v 0 1 0 0.9v 0 1 1 0.95v 1 0 0 1.05v 1 0 1 1.1v 1 1 0 1.15v 1 1 1 1.2v *after 10s(max) from the bit change, v out change starts. *requiring time for one step (50 mv shift) of v out is 5s(max). *from the bit switching until output voltage reach to setting value, t vid (max)=0.06ms delay will occur. vout vid<2:0> (0,0,1) (1,1,1) 1.2 v 0.85v tvid (max)=0.06ms fig.31 timing chart of setting the output voltage about 10s from bit switching vout count stop about 10s from switching the last bit vid<2> vid<1> vid<0> 1 v2d 2 vout 0 count stop about 10s from bit switching vid<2> vout count stop vid<1> vid<0> 5 s ( max ) technical note 10/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv ? short-current protection circuit with time delay function turns off the output to protect the ic fr om breakdown when the incorporated current limiter is activated continuously for the fixed time (t latch ) or more. the output thus held tuned off may be re covered by restarting en or by re-unlocking uvlo. fig.32 short-current protection circuit with time delay timing chart switching regulator efficiency efficiency ? may be expressed by the equation shown below: efficiency may be improved by reducing the swit ching regulator power dissipation factors p d as follows: dissipation factors: 1) on resistance dissipation of inductor and fet: pd(i 2 r) 2) gate charge/discharge dissipation: pd(gate) 3) switching dissipation: pd (sw) 4) esr dissipation of capacitor: pd (esr) 5) operating current diss ipation of ic: pd(ic) 1) pd(i 2 r)=i out 2 (r coil +r on ) (r coil [ ]: dc resistance of inductor, r on [ ]: on resistance of fet, i out [a]: output current.) 2) pd(gate)=cgs f v (cgs[f]: gate capacitance of fet f[h]: switching frequency v[v]: gate driving voltage of fet) 4) pd(esr)=i rms 2 esr (i rms [a]: ripple current of capacitor, esr[ ]: equivalent series resistance.) 5) pd(ic)=vin i cc (i cc [a]: circuit current.) = v out i out vin iin 100[%]= p out pin 100[%]= p out p out +p d 100[%] output voltage off latch t2=t latch vcc v out output short circuit threshold voltage i l output voltage off operated mode operated mode uvlo timer latch uvlo output voltage off i l limit t1 technical note 12/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv selection of components externally connected 1. selection of inductor (l) the inductance significantly depends on output ripple current. as seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. appropriate ripple current at output should be 20% more or less of the maximum output current. current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. the inductor must be selected allowing suffic ient margin with which the peak current may not exceed its current rating. if v cc =5.0v, v out =1.2v, f=1mhz, i l =0.3 1.2a=0.36a, for example, select the inductor of low resistance component (such as dcr and acr) to minimize dissipation in the inductor for better efficiency. 2. selection of output capacitor (c o ) output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. output ripple voltage is determined by the equation (4): v out = i l esr [v]??? (4) ( il: output ripple current, esr: equivalent series resistance of output capacitor) rating of the capacitor should be determined allowing sufficient margin against output voltage. a 10f to 100f ceramic capacitor is recommended. less esr allows reduction in output ripple voltage. 3. selection of input capacitor (cin) input capacitor to select must be a low esr capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. the ripple current irms is given by the equation (5): a low esr 10f/10v ceramic capacitor is recommended to reduc e esr dissipation of input capacitor for better efficiency. i l = (v cc -v out )v out l v cc f [ a ] ??? ( 1 ) i l =0.3 i out max. [a] ???(2) l= (v cc -v out )v out i l v cc f [ h ] ??? ( 3 ) (i l : output ripple current, and f: switching frequency) ( 5-1.2 ) 1.2 0.6 5 1m l= =2.53 4.7 [h] fig.34 output ripple current i l v cc il l co vout i l fig.35 output capacitor v cc l co v out esr i rms =i out v out ( v cc -v out ) v cc [a] ??? ( 5 ) when vcc=2 v out , i rms = i out 2 < worst case > i rms(max.) if v cc =5v, v out =1.2v, and i outmax.= 1.2a, i rms =1.2 1.2 ( 5-1.2 ) 5 =0.51 [ a rms ] fig.36 input capacitor v cc l co v out cin technical note 13/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv fig.39 typical application 4. determination of rith, cith that works as a phase compensator as the current mode control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a cr filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its esr. so, the phases are easily compensated by adding a zero to the power amplifier output with c and r as described bel ow to cancel a pole at the power amplifier. stable feedback loop may be achieved by canceling the pol e fp (min.) produced by the output capacitor and the load resistance with cr zero correction by the error amplifier. fig.37 open loop gain characteristics fig.38 error amp phase compensation characteristics fp= 2 r o c o 1 fz (esr) = 2 e sr c o 1 pole at power amplifie r when the output current decreas es, the load resistance ro increases and the pole frequency lowers. fp (min.) = 2 r omax. c o 1 [hz] with lighter load fp (max.) = 2 r omin. c o 1 [hz] with heavier load zero at power amplifie r increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (this is because when the capacitance is doubled, the capacitor esr reduces to half.) fz (amp.) = 2 r ith. c ith 1 gain [db] phase [deg] a 0 0 -90 a 0 0 -90 fz(amp.) fp(min.) fp(max.) fz(esr) i out min. i out max. gain [db] phase [deg] fz (amp.) = fp (min.) 2 r ith c ith 1 = 2 r omax. c o 1 gnd,pgnd sw v cc ,pv cc en v out ith v cc v out cin r ith c ith l esr c o r o v out pgood v cc r pg vid<2:0 ) vid<2:0> technical note 14/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv cautions on pc board layout fig.40 layout diagram lay out the input ceramic capacitor cin closer to the pins pvcc and pgnd, and the output capacitor co closer to the pin pgnd. lay out cith and rith between the pi ns ith and gnd as neat as possible with least necessary wiring. vqfn016v3030 has thermal pad on t he reverse of the package. the package thermal performance may be enhanced by bonding the pad to gnd plane which take a large area of pcb. recommended components lists on above application recommended components lists symbol part value manufacturer series l coil 4.7uh tdk vlf5014s-4r7m1r7 c in ceramic capacitor 10uf kyocera cm316x5r106m10a c o ceramic capacitor 22uf kyocera cm316b226m06a c ith ceramic capacitor 1500pf murata grm18 series r ith resistance 9.1k rohm mcr03 series cf ceramic capacitor 0.1uf murata grm18 series rf resistance 100 rohm mcr03 series the parts list presented above is an example of recommend ed parts. although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. be sure to allow sufficient margins to accommodate variations between external devices and this ic when employing the depicted circuit with other circuit constants modified. both static and transient characteristics should be considered in establishing these margins. when switching noise is substantial and may impact the system, a low pass filter should be inserted between the vcc and pvcc pins, and a schottky barrier diode or snubber established between the sw and pgnd pins. technical note 15/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv i/o equivalence circuit bd9123muv ?en pin ? sw pin ? vout pin ? ith pin ? pgood ?vid 2:0 pin fig.41 i/o equivalence circuit en pv cc sw pv cc pv cc ith v cc vout vid 2:0 pgood technical note 16/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv notes for use 1. absolute ma ximum ratings while utmost care is taken to quality control of this pr oduct, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operatin g temperature range may result in breakage. if broken, short-mode or open-mode may not be identified. so if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary sa fety measures physically including insertion of fuses. 2. electrical potential at gnd gnd must be designed to have the lowest elec trical potential in any operating conditions. 3. short-circuiting between terminals, and mismounting when mounting to pc board, care must be taken to avoid mistak e in its orientation and alignment. failure to do so may result in ic breakdown. short-circuiting due to foreign matters entered between output te rminals, or between output and power supply or gnd may also cause breakdown. 4. thermal shutdown protection circuit thermal shutdown protection circuit is the circuit designed to isolate the ic from thermal runaway, and not intended to protect and guarantee the ic. so, the ic the thermal shutdown protection circui t of which is once activated should not be used thereafter for any operation originally intended. 5. inspection with the ic set to a pc board if a capacitor must be connected to the pin of lower impedanc e during inspection with the ic set to a pc board, the capacitor must be discharged after each process to avoid stre ss to the ic. for electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. when connecting to jigs in the inspection process, be sure to turn off the power supply before it is connected and removed. 6. input to ic terminals this is a monolithic ic with p + isolation between p-substrate and each element as illustrated below. this p-layer and the n-layer of each element form a p-n junction, and various parasitic elements are formed. if a resistor is joined to a transistor terminal as shown in fig 42. p-n junction works as a parasitic diode if the following relati onship is satisfied; gnd>terminal a (at resistor side), or gnd>terminal b (at transistor side); and if gnd>terminal b (at npn transistor side), a parasitic npn transistor is activated by n-layer of ot her element adjacent to the above-mentioned parasitic diode. the structure of the ic inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdow n. it is therefore requested to take care not to use the device in such manner that the voltage lower than g nd (at p-substrate) may be applied to t he input terminal, which may result in activation of parasitic elements. 7. ground wiring pattern if small-signal gnd and large-current gnd are provided, it will be recommended to separate the large-current gnd pattern from the small-signal gnd pattern and establish a si ngle ground at the reference poi nt of the set pcb so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluc tuations in voltages of the small-signal gnd. pay attention not to cause fluctuations in the gnd wiring pattern of external parts as well. 8. selection of inductor it is recommended to use an inductor with a series resistance element (dcr) 50m or less. especially, in case output voltage is set 1.6v or more, note that use of a high dcr i nductor will cause an inductor loss , resulting in decreased output voltage. should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated a nd output will be latched off. when using an inductor over 50m , be careful to ensure adequate margins for variation between external devices and this ic, including transient as well as static characteristics. furthermore, in any case, it is recommended to start up the out put with en after supply voltage is within operation range. fig.42 simplified structure of monorisic ic resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element technical note 17/17 www.rohm.com 2011.01 - rev. a ? 2011 rohm co., ltd. all rights reserved. bd9123muv ordering part number b d 9 1 2 3 m u v - e 2 part no. part no. package muv : vqfn016v3030 packaging and forming specification e2: embossed tape and reel ? order quantity needs to be multiple of the minimum quantity. r1120 a www.rohm.com ? 2011 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the produc ts. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redundancy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. |
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